// INTERACTIVE SYSTEMS
AxioByte
Systems concepts you can take apart. Each model here is the same 3D scene an AxioByte video is rendered from — orbit it, click a part, and follow the data through it.
5 interactive models · release 1.2.0
How packets get from a wire into memory and out again: the NIC, Ethernet, PCIe, DMA, RSS and DPDK.
- Network Interface Cardinteractive 3D
An interactive, fully procedural 3D model of a dual-port 10GBASE-T PCIe NIC. Orbit it, click any part, lift the heatsink, and follow a packet from the RJ45 port to the RX queue.
NICPCIeDMARSSRX/TX queues - NIC to host memoryinteractive 3D
The first AxioByte system: the NIC in its PCIe slot, the lanes to the CPU, the memory channels to host memory — and DMA, the NIC writing each packet straight into a buffer in memory while no core copies it.
SystemNICPCIeCPUHost memoryDMA
I/O
1How devices attach to the CPU and memory: PCIe slots, lanes and links, the interconnect every card depends on.
- PCI Express (PCIe)interactive 3D
An interactive 3D model of a PCIe x8 slot and its link: the contacts a card plugs into, the eight lanes of differential pairs, and the path to the CPU's root complex.
PCIeLanesLinkEndpointRoot complex
The processors that run the software: cores, caches, and the interfaces that tie them to memory and to devices.
- Central Processing Unit (CPU)interactive 3D
An interactive 3D model of a processor package: lift the heat spreader to see the die and its cores, cache, memory controller and PCIe root complex, or turn it over to see where memory and PCIe connect.
CPUCoresCacheMemory controllerPCIe root complex
Where software and devices keep their data: host memory, and the rings and buffers allocated in it.
- Host memoryinteractive 3D
An interactive 3D model of host memory: the memory modules, and a map of the address space they provide — with a descriptor ring and packet buffers allocated in it, as a NIC uses them.
Host memoryDRAMDIMMDescriptor ringPacket buffers